Assoc. Prof. Tsutsui participated Collaborative Work for Embedded Systems Training (Phase-2) held at Universities’ Research Centre (URC), the University of Yangon. The workshop was held on 20 Aug. to 5 Sep. He gave some lectures and exercises using DE0 FPGA board. The topic where he involved was related to hardware description languages mainly targeting NSL and C programming for a tiny embedded processor, SN/X.
We gave a set of demonstrations, including Robi robot, speech recognition, and real-time image processing using FPGA, in PARE Program Summer School at Hokkaido University.
ICN Lab services including web service will be temporarily suspended due to the planned power outage in Sapporo Campus of Hokkaido University.
Period: Sep 6 2014 18:00 – Sep 8 2014 10:00
Related to the AUN / SEED-Net CRI Meeting of the other day, some members of this project have been working for this project at our laboratory. Finally, we had a meeting on 1st Aug (Fri) again.
We held a meeting of AUN/SEED-Net CRI (Collaborative Research Program with Industry) with the program members.
Prof. Rachada Kongkachandra (Thammasat University, Thailand) with her colleagues and students visited our laboratory. We presented the research topics to each other and discussed them.
Mr. Umehara presented our research achievements at Smart Info-media Systems (SIS) Technical Committee (TC) Conference held in Hokkaido University Centennial Hall on 10th July. This TC Conference was cosponsored by SIS-TC and TCs from System and Signal Processing Sub-Society (SSP) which includes Circuits and Systems (CAS), VLSI Design Technologies (VLD), Signal Processing (SIP), and Mathematical Systems Science and Its Applications (MSS). Assoc. Prof. Tsutsui served as one of local organizers.
The following paper presented in the last year’s ITC-CSCC (2013) won a best paper award.
Related page: Processor Architecture and Systems Synthesis Laboratory (Kyoto University)
The topic operated by our laboratyry for Media Network Laboratory IB changed to digital circuit design using FPGA board this year. 3rd-year undergraduate students tried to implement a calculator on Altera’s DE0 FPGA board.
A technical lecture related to 3D video was given by Prof. Yo-Sung Ho from GIST. M2 Matsuura, M1 Inatsuki, and M1 Dabwitso made presentation about their works.
Date: 14:30-, July 4, 2014
Room: 11-17, Grad School of IST Building, Hokkaido University
Title: MPEG Activities for 3D Video Coding
Lecturer: Professor Yo-Sung Ho (Gwangju Institute of Science and Technology)
