Category Archives: Event

Jingiskan party

On June 26, we held a farewell Jingiskan party for Mr. Chen Sovann.

Welcome and farewell party

On May 10, we held a welcome party for new members (Mr. Jie Li, Ms. Yunzhe Wang, and Ms. Nutkrita Ritruk) and also as the farewell party for Ms. Ei Ei Tun.

“Campus Clean Day” 2018

Today, we participated “Campus Clean Day” of Hokkaido University.

Farewell Party JFY 2017

We held a farewell party on March 13.

Introduction of Our Course for Freshmen (Feb. 2018)

On February 7 (Wed), I introduced our course, Course of Media and Network Technologies, to first-year undergraduate students as one laboratory of our course.

Lab’s year-end party and welcome party.

On Dec 26 (Tuesday), we held a Lab’s year-end party also welcoming four new members (Mr. Tomotaka Kawabata, Mr. Atsuki Kuriyama, Mr. Takuto Fukusaki, and Mr.Haruki Inaba).

Welcome Party for New Members

On Oct 31, we enjoyed a welcome party for laboratory new members, Associate Professor Matteo Convertino and Mr. Tian Yu.

Lab tour for 3rd-year undergraduate students, 2017

Lab tour is available for 3rd-year undergraduate students.

  • Venue: IST Building 11th floor 11-13
    (Laboratory of Information Communication Networks)
  • Schedule: In the following time slots, M1 students are available for introducing our laboratory. The representatives of M1 students are Mr. Nakagoshi and Mr. Watanabe. We welcome your visit not limited to the following time slots.
    • Nov. 8 (Wed) 16:30-18:00
    • Nov. 9 (Thu) 16:30-18:00
    • Nov. 10(Fri) 16:30-18:00 ← NEW!
    • Nov. 13 (Mon) 16:30-18:00
    • The time slots of Wed and Thu overwrap the time of MN experiment II. Please come only if you completed your experiment task and you have time.

IST Building 11F (the top floor)

2017 Joint Convention, the Hokkaido Chapters of the Institutes of Electrical and Information Engineers

Mr. Watanabe presented his paper at 2017 Joint Convention, the Hokkaido Chapters of the Institutes of Electrical and Information Engineers, which was held at Future University Hakodate on Oct 28th-28th. In this paper, we presented an implementation approach to avoid memory conflicts of parallel processing to realize high throughput LDPC decoding.

  • Taishi Watanabe, Takahiro Ikeshita, Hiroshi Tsutsui, Takashi Imagawa, Yoshikazu Miyanaga, “A Design of High-Throughput LDPC Min-Sum Decoder Using Parallelization,” Joint Conference of Electrical, Electronics and Information Engineers in Hokkaido, pp. 102-103, Oct. 2017 (in Japanese).

A student exchange meeting was held during this convention. Students of each university made presentations about their university, research activity, and student activity. Mr. Watanabe who is the member of IEEE student branch at Hokkaido university introduced the activity of the student branch.